ARMSim: Simulating Advanced RISC Machine Architecture

This paper discusses the design and implementation of the ARMSim, a simulator implemented in the Java and C programming languages for the Advanced RISC Machine (ARM) processor. The intended users of this tool are those individuals interested in learning computer architecture, particularly those with an interest in the Advanced RISC Machine processor family. ARMSim facilitates the learning of computer architecture by offering a hands on approach to those who have no access to the actual hardware. The core of the simulator is implemented in C with and models a fetch-decode-execute paradigm; a Java GUI is included for portability. The details of the ARM architecture, including registers, instruction set and implementation will be discussed in later sections. A binary tree traversal algorithm is introduced to make the decoding part of the simulator more efficient. This increases the overall performance of the simulator.